Multiple cores
Multiple cores means multiple processors that are able to process the same amount of data each. It is common to see dual ad quad cores or even more cores in modern processors. It is definitely useful if you are running
several applications. Whether or not you will see a substantial boost in the speed of certain applications running on their own depends on whether they have been written to take advantage of multiple cores. It is more complex
to design and write programs to take advantage of multiple cores.
Cache memory
Pronounced cash, cache memory is small amounts of superfast memory on or near the processor. There are often levels of cache in a computer with L1 cache the smallest and fastest and L3 the slowest and largest. All cache is
faster to access than RAM.
Cache holds recently and frequently used instructions and data. Cache memory is most useful in improving speeds for things like image and sound intensive programs like games and video editors and
for programs performing large amounts of complex mathematical analysis.
Clock speed
The clock speed is the number of times the clock switches between 0 and 1 each second. This is measured in hertz (Hz). Modern computers generally have a clock speed of between 2 and 4 GHz meaning over 2 billion clock switches
each second. A processor performs operations on the uptick of the clock. Each processor in a multi-core processor can perform the same number of operations so a 2GHz quad core can in effect perform 8 billion instructions per
second.
Address bus width
The width of the address bus determines the number of memory addresses that can be directly accessed. If you have an 8-bit address bus you can reference 256 addresses. To be able to have up to 216 or 65536
addresses the address would have to be sent in 2 parts slowing down the operation of the processor.
Data bus width
The width of the data bus determines the amount of data that can be transferred at one time. In most computers the data bus is the same width as the computer word. If a processor had a 64-bit computer word but only a 32 bit
data bus then it would take two trips for each instruction or piece of data.